Write should probably be it's own

This commit is contained in:
2026-03-30 13:25:24 +02:00
parent e9978e99c1
commit 24c6140b9d

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@@ -128,13 +128,13 @@ execute cpu = \case
IncHL -> let target = getHL $ cpu ^. registers IncHL -> let target = getHL $ cpu ^. registers
value = fetch cpu target value = fetch cpu target
(newValue, newFlags) = add value 1 False in (newValue, newFlags) = add value 1 False in
cpu & bus %~ (flip V.update $ V.singleton (fromIntegral target, newValue)) & registers . flags .~ newFlags write cpu target newValue & registers . flags .~ newFlags
DecR t -> let (value, newFlags) = sub (cpu ^. registers . t) 1 False in DecR t -> let (value, newFlags) = sub (cpu ^. registers . t) 1 False in
cpu & registers . t .~ value & registers . flags .~ newFlags cpu & registers . t .~ value & registers . flags .~ newFlags
DecHL -> let target = getHL $ cpu ^. registers DecHL -> let target = getHL $ cpu ^. registers
value = fetch cpu target value = fetch cpu target
(newValue, newFlags) = sub value 1 False in (newValue, newFlags) = sub value 1 False in
cpu & bus %~ (flip V.update $ V.singleton (fromIntegral target, newValue)) & registers . flags .~ newFlags write cpu target newValue & registers . flags .~ newFlags
where where
add :: Word8 -> Word8 -> Bool -> (Word8, FlagRegister) add :: Word8 -> Word8 -> Bool -> (Word8, FlagRegister)
add o n _c = let new = o + n + if _c then 1 else 0 add o n _c = let new = o + n + if _c then 1 else 0
@@ -143,8 +143,6 @@ execute cpu = \case
_carry = o > new _carry = o > new
_halfCarry = o .&. 16 + n .&. 16 > 16 in _halfCarry = o .&. 16 + n .&. 16 > 16 in
(new, FlagRegister {..}) (new, FlagRegister {..})
fetch :: CPU -> Word16 -> Word8
fetch _cpu addr = flip V.index (fromIntegral addr) $ _cpu ^. bus
sub :: Word8 -> Word8 -> Bool -> (Word8, FlagRegister) sub :: Word8 -> Word8 -> Bool -> (Word8, FlagRegister)
sub o n _c = let new = o - n - if _c then 1 else 0 sub o n _c = let new = o - n - if _c then 1 else 0
@@ -153,3 +151,9 @@ execute cpu = \case
_carry = o > new _carry = o > new
_halfCarry = o .&. 16 + n .&. 16 > 16 in _halfCarry = o .&. 16 + n .&. 16 > 16 in
(new, FlagRegister {..}) (new, FlagRegister {..})
fetch :: CPU -> Word16 -> Word8
fetch _cpu addr = flip V.index (fromIntegral addr) $ _cpu ^. bus
write :: CPU -> Word16 -> Word8 -> CPU
write _cpu target value = _cpu & bus %~ (flip V.update $ V.singleton (fromIntegral target, value))